ASIC Design Verification Engineer Networking Security

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

Are you driven, inquisitive, and hungry for knowledge? AMD is looking for people like you to join their world‑class verification team delivering ASIC IP to address next‑generation networking and security applications. As a key contributor, you will be part of a leading team to drive and improve AMD's ability to deliver the highest quality, industry‑leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

The ideal candidate will possess a problem‑solving mindset, attention to detail and the curiosity to uncover hard‑to‑find issues.

KEY RESPONSIBILITIES:

• Collaborate with design, architecture and physical design teams to achieve first‑pass silicon success


• Drive the testbench architecture and development, test planning and writing and the debug work of leading‑edge networking IP


• Execute verification strategy for cutting‑edge designs


• Promote and incorporate use of AI‑powered verification tools into daily development flow


• Identify methodology improvements to facilitate better horizontal and vertical reuse and shorter development time


• Propose strategies for faster coverage closureIdentify opportunities for TB component reuse between simulation and emulation


• Offer mentorship to younger team members

PREFERRED EXPERIENCE:

• Previous experience in ASIC/FPGA verification with a track record of successful tapeouts


• Extensive experience in designing and implementing self‑checking testbenches, coverage closure techniques and regression management flows


• In depth knowledge of modern verification practices including UVM, Formal Verification and assertion‑based test


• Hands on experience using AI tools for design verification


• Experience and knowledge of communications standards (such as IEEE 802.3 Ethernet, Flex Ethernet, OTN, Interlaken, PCIe)


• Fluency in Verilog or System Verilog


• Excellent written and verbal communication skills


• Experience with VCS simulation tool, Perl/Shell scripting


• Knowledge of C/C++ is a plus

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering/Computer Science

LOCATION:

Markham OR Ottawa, Ontario, CA

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.